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LT3956 3956f typical a pplica t ion fea t ures a pplica t ions descrip t ion 80v in , 80v out constant-current, constant-voltage converter the lt ? 3956 is a dc/dc converter designed to operate as a constant-current source and constant-voltage regulator. it is ideally suited for driving high current leds. it features an internal low side n-channel power mosfet rated for 84v at 3.3a and driven from an internal regulated 7.15v supply. the fxed frequency, current-mode architecture results in stable operation over a wide range of supply and output voltages. a ground referenced voltage fb pin serves as the input for several led protection features, and also makes it possible for the converter to operate as a constant-voltage source. a frequency adjust pin allows the user to program the frequency from 100khz to 1mhz to optimize effciency, performance or external component size. the LT3956 senses output current at the high side of the led string. high side current sensing is the most fexible scheme for driving leds, allowing boost, buck mode or buck-boost mode confguration. the pwm input provides led dimming ratios of up to 3000:1, and the ctrl input provides additional analog dimming capability. 94% effcient 25w white led headlamp driver n 3000:1 true color pwm tm dimming n wide input voltage range: 4.5v to 80v n output voltage up to 80v n internal 3.3a/84v switch n constant-current and constant-voltage regulation n 250mv high side current sense n drives leds in boost, buck mode, buck-boost mode, sepic or flyback topology n adjustable frequency: 100khz to 1mhz n open led protection n programmable undervoltage lockout with hysteresis n constant-voltage loop status pin n pwm disconnect switch driver n ctrl pin adjusts high side current sense threshold n low shutdown current: <1a n programmable soft-start n available in the 36-lead (5mm 6mm) qfn package n high power led n battery charger n accurate current limited voltage regulator v in sw LT3956 22h d1 gnd v c intv cc en/uvlo pgnd v ref isp 332k 100k intv cc 332k 2.2f s 2 2.2f s 5 4.7nf v in , 6v to 60v (80v transient) 47nf 100k 34k 28.7k 375khz 4.7f 40.2k ctrl 16.2k 1m 0.68 370ma m1 intv cc 25w led string 3956 ta01a vmode pwm ss rt isn fb pwmout effciency vs v in v in (v) 0 20 80 efficiency (%) 84 88 92 96 100 40 60 80 3956 ta01b l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks and true color pwm is a trademark of linear technology corporation. all other trademarks are the property of their respective owners. protected by u.s. patents, including 7199560 and 7321203.
LT3956 3956f a bsolu t e maxi m u m r a t ings v in , isp, isn .............................................................. 80v sw ............................................................................ 84v en/uvlo (note 3) ..................................................... 80v intv cc ...................................................... v in + 0.3v, 8v pwmout .................................................. intv cc + 0.3v ctrl, pwm, vmode ................................................ 12v fb ............................................................................... 8v v c , v ref , ss ................................................................ 3v rt ............................................................................ 1.5v pgnd to gnd ......................................................... 0.5v operating junction temperature range (note 2) ............................................. C40c to 125c maximum junction temperature ........................... 125c storage temperature range ................... C65c to 125c lead temperature (soldering, 10 sec) .................. 300c (note 1) or d er in f or m a t ion lead free finish tape and reel part marking* package description temperature range LT3956euhe#pbf LT3956euhe#trpbf 3956 36-lead (5mm 6mm) plastic qfn C40c to 125c LT3956iuhe#pbf LT3956iuhe#trpbf 3956 36-lead (5mm 6mm) plastic qfn C40c to 125c consult ltc marketing for parts specifed with wider operating temperature ranges. *the temperature grade is identifed by a label on the shipping container. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ this product is only offered in trays. for more information go to: http://www.linear.com/packaging/ parameter conditions min typ max units v in minimum operating voltage v in tied to intv cc l 4.5 v v in shutdown i q en/uvlo = 0v en/uvlo = 1.15v 0.1 1 5 a a v in operating i q (not switching) pwm = 0v 1.4 1.7 ma v ref voltage C100a i vref 0a l 1.965 2.00 2.045 v v ref line regulation 4.5v v in 80v 0.006 %/v p in c on f igura t ion 12 13 14 top view 37 gnd 38 sw uhe package 36-lead (5mm s 6mm) plastic qfn 15 16 17 36 35 34 33 32 31 30 21 23 24 25 27 28 8 6 4 3 2 1 nc en/uvlo intv cc gnd v in sw sw nc isp isn fb gnd pwmout sw sw rt ss vmode pwm v ref ctrl v c pgnd pgnd pgnd pgnd pgnd pgnd 20 9 10 t jmax = 125c, ja = 43c/w, jc = 5c/w exposed pad (pin 37) is gnd, must be soldered to pcb exposed pad (pin 38) is sw, must be soldered to pcb e lec t rical c harac t eris t ics the l denotes the specifcations which apply over the full operating temp- erature range, otherwise specifcations are at t a = 25c. v in = 24v, en/uvlo = 24v, ctrl = 2v, pwm = 5v, unless otherwise noted.
LT3956 3956f e lec t rical c harac t eris t ics the l denotes the specifcations which apply over the full operating temp- erature range, otherwise specifcations are at t a = 25c. v in = 24v, en/uvlo = 24v, ctrl = 2v, pwm = 5v, unless otherwise noted. parameter conditions min typ max units sw pin leakage sw = 48v 5 10 a sw pin current limit l 3.3 3.9 4.6 a sw pin voltage drop i(sw) = 2a 220 mv ss pull-up current current out of pin 8 10 13 a error amplifer full-scale current sense threshold ( v (ispCisn) ) fb = 0v, isp = 48v, ctrl 1.2v l 240 250 257 mv current sense threshold at ctrl = 1v ( v (ispCisn) ) ctrl = 1v, fb = 0v, isp = 48v l 217 225 231 mv current sense threshold at ctrl = 0.5v ( v (ispCisn) ) ctrl = 0.5v l 96 100 103 mv current sense threshold at ctrl = 0.1v ( v (ispCisn) ) ctrl = 0.1v, fb = 0v, isp = 48v l C2.5 0 4.5 mv ctrl range for current sense threshold adjustment 0 1.1 v ctrl input bias current current out of pin, ctrl = 0v 50 100 na current sense amplifer input common mode range ( v isn ) 2.9 80 v isp/isn short-circuit threshold ( v (ispCisn) ) isn = 0v 300 335 370 mv isp/isn short-circuit fault sensing common mode range ( v isn ) 0 3 v isp/isn input bias current (combined) pwm = 5v (active), isp = isn = 48v pwm = 0v (standby), isp = isn = 48v 80 0 0.1 a a led current sense amplifer g m 120 s v c output impedance 1v < v c < 2v 15000 k v c standby input bias current pwm = 0v C20 20 na fb regulation voltage (v fb ) isp = isn = 0v, 48v l 1.220 1.232 1.250 1.250 1.270 1.265 v v fb amplifer g m fb = v fb , isp = isn 480 s fb pin input bias current current out of pin, fb = 1v 40 100 na fb voltage loop active threshold vmode falling v fb C 65mv v fb C 50mv v fb C 40mv v fb overvoltage threshold pwmout falling v fb + 50mv v fb + 60mv v fb + 80mv v oscillator switching frequency r t = 100k r t = 10k l 90 925 100 1000 125 1050 khz khz sw minimum off-time 170 ns sw minimum on-time 200 ns linear regulator intv cc regulation voltage 7 7.15 7.3 v dropout (v in C intv cc ) i intvcc = C10ma, v in = 7v 1 v intv cc undervoltage lockout l 4.1 4.4 v intv cc current limit 14 17 25 ma intv cc current in shutdown en/uvlo = 0v, intv cc = 7v 8 12 a
LT3956 3956f e lec t rical c harac t eris t ics the l denotes the specifcations which apply over the full operating temp- erature range, otherwise specifcations are at t a = 25c. v in = 24v, en/uvlo = 24v, ctrl = 2v, pwm = 5v, unless otherwise noted. parameter conditions min typ max units logic inputs/outputs pwm threshold voltage l 0.85 1.35 1.8 v pwm pin resistance to gnd 45 60 k en/uvlo threshold voltage falling l 1.185 1.220 1.245 v en/uvlo rising hysteresis 20 mv en/uvlo input low voltage i vin drops below 1a 0.4 v en/uvlo pin bias current low en/uvlo = 1.15v 1.7 2.1 2.5 a en/uvlo pin bias current high en/uvlo = 1.30v 10 100 na vmode output low (v ol ) i vmode = 1ma 200 mv vmode pin leakage fb = 0v, vmode = 12v 0.1 5 a pwmout driver t r pwmout driver output rise time c l = 560pf 35 ns t f pwmout driver output fall time c l = 560pf 35 ns pwmout output low (v ol ) 0.05 v pwmout output high (v oh ) intv cc C 0.05 v note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the LT3956e is guaranteed to meet performance specifcations from 0c to 125c junction temperature. specifcations over the C40c to 125c operating junction temperature range are assured by design, characterization and correlation with statistical process controls. the LT3956i is guaranteed to meet performance specifcations over the C40c to 125c operating junction temperature range. note 3: for v in below 6v, the en/uvlo pin must not exceed v in for proper operation. v (isp C isn) threshold vs v ctrl v (isp C isn) threshold vs v isp with reduced ctrl voltage v (isp C isn) full-scale threshold vs temperature ctrl voltage (v) 0 ?50 v (is p ? isn) threshold (mv) 50 150 250 0.5 1 1.5 300 0 100 200 2 3956 g01 isp voltage (v) 0 97 v (is p ? isn) threshold (mv) 99 101 20 40 80 60 103 98 100 102 3956 g02 ctrl = 0.5v 242 246 250 256 254 244 248 252 3956 g03 v (is p ? isn) threshold (mv) temperature (c) ?50 0 50 75 ?25 25 100 125 ctrl = 2v typical p er f or m ance c harac t eris t ics t a = 25c, unless otherwise noted.
LT3956 3956f typical p er f or m ance c harac t eris t ics fb regulation voltage (v fb ) vs temperature v ref voltage vs temperature v ref voltage vs v in switching frequency vs r t switching frequency vs temperature en/uvlo hysteresis current vs temperature t a = 25c, unless otherwise noted. r t (k) switching frequency (khz) 3956 g07 10000 1000 100 10 10 100 3956 g04 v fb (v) temperature (c) ?50 0 50 75 ?25 25 100 125 1.20 1.22 1.24 1.26 1.28 1.21 1.23 1.25 1.27 3956 g05 v ref (v) temperature (c) ?50 0 50 75 ?25 25 100 125 1.96 1.98 2.00 2.02 2.04 1.97 1.99 2.01 2.03 v in (v) 1.96 v ref (v) 1.98 2.00 2.02 2.04 1.97 1.99 2.01 2.03 3956 g06 0 20 40 80 60 3956 g08 switching frequency (khz) temperature (c) ?50 0 50 75 ?25 25 100 125 300 400 500 350 450 r t = 26.7k 3956 g09 temperature (c) ?50 0 50 75 ?25 25 100 125 1.6 i en/uvlo (a) 2.0 2.4 1.8 2.2 quiescent current vs v in sw pin current limit vs temperature en/uvlo threshold vs temperature 3956 g12 en/uvlo voltage (v) temperature (c) 1.18 1.22 1.28 1.20 1.24 1.26 en/uvlo rising en/uvlo falling ?50 0 50 75 ?25 25 100 125 v in (v) 0 v in current (ma) 1.0 2.0 0.5 1.5 3956 g10 0 20 40 80 60 pwm = 0v current limit (a) 4.2 4.0 3.8 3.6 4.4 3956 g11 temperature (c) ?50 0 50 75 ?25 25 100 125
LT3956 3956f typical p er f or m ance c harac t eris t ics quiescent current vs switching frequency intv cc current limit vs temperature intv cc voltage vs temperature t a = 25c, unless otherwise noted. intv cc dropout voltage vs intv cc current sw pin current limit vs duty cycle led current sense threshold vs fb voltage 0 4 8 12 2 6 10 3956 g13 v in current (ma) switching frequency (khz) 0 400 800 200 600 1000 3956 g14 intv cc current limit (ma) temperature (c) 10 14 20 12 16 18 ?50 0 50 75 ?25 25 100 125 not switching 3956 g15 intv cc (v) temperature (c) ?50 0 50 75 ?25 25 100 125 7.0 7.2 7.4 7.1 7.3 duty cycle (%) 2.5 sw pin current limit (a) 3.5 4.5 3.0 4.0 3956 g16 0 25 50 75 100 fb voltage (v) 3956 g17 1.2 1.22 1.24 1.26 1.28 0 125.0 312.5 62.50 187.5 250.0 v (is p ? isn) threshold (mv) v ctrl = 2v ldo current (ma) 0 ?2.5 ldo dropout (v) ?2.0 ?1.5 ?1.0 ?0.5 0 3 6 9 12 15 3956 g18 ?40 c 25 c 125 c pwmout waveform switch on-resistance vs temperature isp/isn input bias current vs ctrl voltage ctrl (v) 0 input bias current (a) 40 80 20 60 3956 g19 0 0.5 1 1.5 2 isp isn temperature (c) ?50 on-resistance (m) 120 140 160 100 80 ?25 25 0 50 75 100 125 20 0 60 180 40 3956 g20 200ns/div pwm input pwmout 5v/div 3956 g21 c pwmout = 2.2nf
LT3956 3956f p in func t ions fb: voltage loop feedback pin. fb is intended for con - stant-voltage regulation or for led protection/open led detection. the internal transconductance amplifer with output v c will regulate fb to 1.25v (nominal) through the dc/dc converter. if the fb input is regulating the loop, the vmode pull-down is asserted. this action may signal an open led fault. if fb is driven above the fb threshold (by an external power supply spike, for example), the vmode pull-down will be de-asserted and the pwmout pin will be driven low to protect the leds from an overcurrent event. do not leave the fb pin open. if not used, connect to gnd. isn: connection point for the negative terminal of the current feedback resistor. if isn is greater than 2.9v, the led current can be programmed by i led = 250mv/r led when v ctrl > 1.2v or i led = (v ctrl C100mv)/(4 ? r led ) if v ctrl < 1v. input bias current is typically 20a. below 3v, isn is an input to the short-circuit protection feature that forces gate to 0v if isp exceeds isn by more than 350mv (typ). isp: connection point for the positive terminal of the current feedback resistor. input bias current for this pin depends on ctrl pin voltage, as shown in the typical performance characteristics. isp is an input to the short-circuit protec - tion feature when isn is less than 3v. v c : transconductance error amplifer output pin. this pin is used to stabilize the voltage loop with an rc network. this pin is high impedance when pwm is low, a feature that stores the demand current state variable for the next pwm high transition. connect a capacitor between this pin and gnd; a resistor in series with the capacitor is recommended for fast transient response. ctrl: current sense threshold adjustment pin. regula- ting threshold v (isp C isn) is 0.25 ? v ctrl plus an offset for 0v < v ctrl < 1v. for v ctrl > 1.2v the current sense threshold is constant at the full-scale value of 250mv. for 1v < v ctrl < 1.2v, the dependence of the current sense threshold upon v ctrl transitions from a linear function to a constant value, reaching 98% of full-scale value by v ctrl = 1.1v. connect ctrl to v ref for the 250mv default threshold. do not leave this pin open. nc: no internal connection. these pins may be left foating or connected to an adjacent pin. en/uvlo: shutdown and undervoltage detect pin. an accurate 1.22v falling threshold with externally program - mable hysteresis detects when power is ok to enable switching. rising hysteresis is generated by the external resistor divider and an accurate internal 2.1a pull-down current. above the 1.24v (nominal) threshold (but below 6v), en/uvlo input bias current is sub-a. below the falling threshold, a 2.1a pull-down current is enabled so the user can defne the hysteresis with the external resis - tor selection. an undervoltage condition resets soft-start. tie to 0.4v, or less, to disable the device and reduce v in quiescent current below 1a. intv cc : regulated supply for internal loads, gate driver and pwmout driver. supplied from v in and regulates to 7.15v (typical). intv cc must be bypassed with a 4.7f capacitor placed close to the pin. connect intv cc directly to v in if v in is always less than or equal to 7v. gnd: ground. the exposed pad, pin 37, is ground and must be soldered directly to the ground plane. v in : input supply pin. must be locally bypassed with a 0.22f (or larger) capacitor to pgnd placed close to the ic. sw: the exposed pad, pin 38, is the drain of the switch - ing n-channel mosfet and must be connected to the external inductor. pgnd: source terminal of switch and the gnd input to the switch current comparator. kelvin connect to the gnd plane close to the ic using pin 12. pins 13 to 17 should be connected externally to the pgnd terminals of components in the switching path. see the board layout section. pwmout: buffered version of the pwm signal. this pin is used to drive the led load disconnect n-channel mosfet or level shift. this pin also serves in a protection function for the fb overvoltage conditionwill toggle if the fb input is greater than the fb regulation voltage (v fb ) plus 60mv (typical). the pwmout pin is driven from intv cc . use of a mosfet with gate cut-off voltage higher than 1v is recommended.
LT3956 3956f b lock diagra m + ? + ? + ? + ? + ? + + ? a1 a3 a6 + + ? freq prog 1.25v ssclamp 1.1v ctrl v ref en/uvlo isp isn q2 350mv 20k 170k 140a 2.1a ctrl buffer g m eamp pwm comparator driver 1ma (max) i sense a4 g m a10 a5 ovfb comparator 1.25v fb short-circuit detect scilmb scilmb 5k pwmout pwm 1.25v v in intv cc vc + ? + ? a2 r q s ramp generator 100khz to 1mhz oscillator + ? + ? a8 7.15v ldo sw pgnd 3956 bd vmode gnd 1.2v fb + ? 1.22v + ? 2v 1.31v rt ss shdn a7 10a 10a at fb = 1.25v vc tsd 165c fault logic 10a 10a at a1 + = a1 ? v ref : voltage reference output pin (typically 2v). this pin drives a resistor divider for the ctrl pin, either for analog dimming or for temperature limit/compensation of led load. can supply up to 100a. pwm: a signal low turns off switcher, idles oscillator and disconnects v c pin from all internal loads. pwmout pin follows pwm pin. pwm has an internal pull-down resistor. if not used, connect to intv cc . vmode : an open-collector pull-down on vmode asserts if the fb input is greater than the fb regulation threshold minus 50mv (typical). to function, the pin requires an external pull-up resistor. when the pwm input is low and the dc/dc converter is idle, the vmode condition is latched to the last valid state when the pwm input was high. when pwm input goes high again, the vmode pin will be updated. this pin may be used to report an open led fault. use a pull-up current less than 1ma. ss: soft-start pin. this pin modulates oscillator fre - quency and compensation pin voltage (v c ) clamp. the soft-start interval is set with an external capacitor. the pin has a 10a (typical) pull-up current source to an internal 2.5v rail. the soft-start pin is reset to gnd by an undervoltage condition (detected by en/uvlo pin) or thermal limit. rt: switching frequency adjustment pin. set the fre - quency using a resistor to gnd (for resistor values, see the typical performance curve or table 1). do not leave the rt pin open. p in func t ions
LT3956 3956f o pera t ion the LT3956 is a constant-frequency, current mode converter with a low side n-channel mosfet switch. the switch and pwmout pin drivers, and other chip loads, are powered from intv cc , which is an internally regulated supply. in the discussion that follows, it will be helpful to refer to the block diagram of the ic. in normal operation, with the pwm pin low, the power switch is turned off and the pwmout pin is driven to gnd, the v c pin is high impedance to store the previous switching state on the external compensation capacitor, and the isp and isn pin bias currents are reduced to leakage levels. when the pwm pin transitions high, the pwmout pin transitions high after a short delay. at the same time, the internal oscillator wakes up and generates a pulse to set the pwm latch, turning on the internal power mosfet switch. a voltage input proportional to the switch current, sensed by an internal current sense resistor, is added to a stabilizing slope compensation ramp and the resulting switch-current sense signal is fed into the positive termi - nal of the pwm comparator. the current in the external inductor increases steadily during the time the switch is on. when the switch-current sense voltage exceeds the output of the error amplifer, labeled v c , the latch is reset and the switch is turned off. during the switch off phase, the inductor current decreases. at the completion of each oscillator cycle, internal signals such as slope compensa - tion return to their starting points and a new cycle begins with the set pulse from the oscillator. through this repetitive action, the pwm control algorithm establishes a switch duty cycle to regulate a current or voltage in the load. the v c signal is integrated over many switching cycles and is an amplifed version of the differ - ence between the led current sense voltage, measured between isp and isn, and the target difference voltage set by the ctrl pin. in this manner, the error amplifer sets the correct peak switch-current level to keep the led current in regulation. if the error amplifer output increases, more current is demanded in the switch; if it decreases, less current is demanded. the switch current is monitored during the on-phase and is not allowed to exceed the current limit threshold of 3.9a (typical). if the sw pin exceeds the current limit threshold, the sr latch is reset regardless of the output state of the pwm compara - tor. likewise, at an isp/isn common mode voltage less than 3v, the difference between isp and isn is monitored to determine if the output is in a short-circuit condition. if the difference between isp and isn is greater than 335mv (typical), the sr latch will be reset regardless of the pwm comparator. these functions are intended to protect the power switch, as well as various external components in the power path of the dc/dc converter. in voltage feedback mode, the operation is similar to that described above, except the voltage at the v c pin is set by the amplifed difference of the internal reference of 1.25v (nominal) and the fb pin. if fb is lower than the reference voltage, the switch current will increase; if fb is higher than the reference voltage, the switch demand current will decrease. the led current sense feedback interacts with the fb voltage feedback so that fb will not exceed the internal reference and the voltage between isp and isn will not exceed the threshold set by the ctrl pin. for accurate current or voltage regulation, it is necessary to be sure that under normal operating conditions, the appropriate loop is dominant. to deactivate the voltage loop entirely, fb can be connected to gnd. to deactivate the led current loop entirely, the isp and isn should be tied together and the ctrl input tied to v ref . two led specifc functions featured on the LT3956 are controlled by the voltage feedback pin. first, when the fb pin exceeds a voltage 50mv lower (C4%) than the fb regulation voltage, the pull-down driver on the vmode pin is activated. this function provides a status indicator that the load may be disconnected and the constant-voltage feedback loop is taking control of the switching regulator. when the fb pin exceeds the fb regulation voltage by 60mv (5% typical), the pwmout pin is driven low, ignoring the state of the pwm input. in the case where the pwmout pin drives a disconnect nfet, this action isolates the led load from gnd, preventing excessive current from damaging the leds. if the fb input exceeds the overvolt - age threshold (1.31v typical), then an externally driven overvoltage event may have caused the fb pin to be too high and the vmode pull-down will be deactivated until the fb pin drops below the overvoltage threshold.
LT3956 0 3956f a pplica t ions i n f or m a t ion intv cc regulator bypassing and operation the intv cc pin requires a capacitor for stable operation and to store the charge for the switch driver and pwmout pin switching currents. choose a 10v rated low esr, x7r or x5r ceramic capacitor for best performance. a 4.7f capacitor will be adequate for many applications. place the capacitor close to the ic to minimize the trace length to the intv cc pin and also to the ic ground. an internal current limit on the intv cc output protects the LT3956 from excessive on-chip power dissipation. the intv cc pin has its own undervoltage disable (uvlo) set to 4.1v (typical) to protect the internal mosfet from excessive power dissipation caused by not being fully en - hanced. if the intv cc pin drops below the uvlo threshold, the pwmout pin will be forced to 0v, the power switch turned off and the soft-start pin will be reset. if the input voltage, v in , will not exceed 7v, then the intv cc pin could be connected to the input supply. this action allows the LT3956 to operate from as low as 4.5v. be aware that a small current (less than 12a) will load the intv cc in shutdown. otherwise, the minimum operating v in value is determined by the dropout voltage of the linear regulator and the 4.4v (4.1v typical) intv cc undervoltage lockout threshold mentioned above. programming the turn-on and turn-off thresholds with the en/uvlo pin the falling uvlo value can be accurately set by the resistor divider. a small 2.1a pull-down current is active when en/uvlo is below the falling threshold. the purpose of this current is to allow the user to program the rising hysteresis. the following equations should be used to determine the values of the resistors: v r r r in fa lli ng , . ? = + 1 2 2 1 2 2 v a r v in ri si ng in fa lli ng , , . ? = + 2 1 1 en/uvlo LT3956 v in r2 3956 f01 r1 figure 1 led current programming the led current is programmed by placing an appropri - ate value current sense resistor, r led , between the isp and isn pins. typically, sensing of the current should be done at the top of the led string. if this option is not available, then the current may be sensed at the bottom of the string, but take caution that the minimum isn value does not fall below 3v, which is the lower limit of the led current regulation function. the ctrl pin should be tied to a voltage higher than 1.2v to get the full-scale 250mv (typical) threshold across the sense resistor. the ctrl pin can also be used to dim the led current to zero, although relative accuracy decreases with the decreasing voltage sense threshold. when the ctrl pin voltage is less than 1v, the led current is: i v m v r led ct rl led = ? 100 4 ? when the ctrl pin voltage is between 1v and 1.2v the led current varies with ctrl, but departs from the previous equation by an increasing amount as the ctrl voltage increases. ultimately, above ctrl = 1.2v, the led current no longer varies with ctrl. at ctrl = 1.1v, the actual value of i led is ~98% of the equations estimate. when v ctrl is higher than 1.2v, the led current is regu - lated to: i mv r led led = 250 the ctrl pin should not be left open (tie to v ref if not used). the ctrl pin can also be used in conjunction with a thermistor to provide overtemperature protection for the led load, or with a resistor divider to v in to reduce output power and switching current when v in is low. the presence of a time varying differential voltage signal (ripple) across isp and isn at the switching frequency is expected. the amplitude of this signal is increased by high led load current, low switching frequency and/or a smaller value output flter capacitor. some level of ripple signal is acceptable: the compensation capacitor on the v c pin flters the signal so the average difference between isp and isn is regulated to the user-programmed value. ripple voltage amplitude (peak-to-peak) in excess of
LT3956 3956f a pplica t ions i n f or m a t ion 20mv should not cause misoperation, but may lead to noticeable offset between the average value and the user- programmed value. output current capability an important consideration when using a switch with a fxed current limit is whether the regulator will be able to supply the load at the extremes of input and output voltage range. several equations are provided to help determine this capability. some margin to data sheet limits is included. for boost converters: i a v v out ma x in mi n out ma x ( ) ( ) ( ) . 2 5 for buck mode converters: i out(max) 2.5a for sepic and buck-boost mode converters: i a v v v out ma x in mi n out ma x i n m in ( ) ( ) ( ) ( ) . ( ) + 2 5 these equations assume the inductor value and switch - ing frequency have been selected so that inductor ripple current is ~600ma. ripple current higher than this value will reduce available output current. be aware that current limited operation at high duty cycle can greatly increase inductor ripple current, so additional margin may be required at high duty cycle. if some level of analog dimming is acceptable at minimum supply levels, then the ctrl pin can be used with a resistor divider to v in (as shown on page 1) to provide a higher output current at nominal v in levels. fb LT3956 v out r4 3956 f02 r3 figure 2. feedback resistor connection for boost or sepic led drivers fb LT3956 100k v out c out r4 3956 f03 r3 led array r led + ? figure 3. feedback resistor connection for buck mode or buck-boost mode led driver programming output voltage (constant-voltage regulation) or open led/overvoltage threshold for a boost or sepic application, the output voltage can be set by selecting the values of r3 and r4 (see figure 2) according to the following equation: v r r r out = + 1 2 5 3 4 4 . ? for a boost type led driver, set the resistor from the output to the fb pin such that the expected voltage level during normal operation will not exceed 1.1v. for an led driver of buck mode or a buck-boost mode confguration, the output voltage is typically level-shifted to a signal with respect to gnd as illustrated in figure 3. the output can be expressed as: v v r r out be = + 1 2 5 3 4 . ? isp/isn short-circuit protection feature for sepic the isp and isn pins have a protection feature indepen - dent of the led current sense feature that operates at isn below 3v. the purpose of this feature is to provide continuous current sensing when isn is below the led current sense common mode range (during start-up or an output short-circuit fault) to prevent the development of excessive switching currents that could damage the power components in a sepic converter. the action threshold (335mv, typ) is above the default led current sense threshold, so that no interference will occur over the isn voltage range where these two functions overlap. this feature acts in the same manner as switch-current limit it prevents switch turn-on until the isp/isn differ - ence falls below the threshold.
LT3956 3956f a pplica t ions i n f or m a t ion dimming control there are two methods to control the current source for dimming using the LT3956. one method uses the ctrl pin to adjust the current regulated in the leds. a second method uses the pwm pin to modulate the current source between zero and full current to achieve a precisely pro - grammed average current. to make this method of current control more accurate, the switch demand current is stored on the v c node during the quiescent phase when pwm is low. this feature minimizes recovery time when the pwm signal goes high. to further improve the recovery time, a disconnect switch may be used in the led current path to prevent the isp node from discharging during the pwm signal low phase. the minimum pwm on or off time will depend on the choice of operating frequency through the r t input. for best overall performance, the minimum pwm low or high time should be at least six switching cycles (6s for f sw = 1mhz). programming the switching frequency the r t frequency adjust pin allows the user to program the switching frequency from 100khz to 1mhz to optimize effciency/performance or external component size. higher frequency operation yields smaller component size but increases switching losses and gate driving current, and may not allow suffciently high or low duty cycle operation. lower frequency operation gives better performance at the cost of larger external component size. for an appropriate r t resistor value see table 1. an external resistor from the rt pin to gnd is requireddo not leave this pin open. table 1. switching frequency vs r t value f osc (khz) r t (k) 1000 10 900 11.8 800 13 700 15.4 600 17.8 500 21 400 26.7 300 35.7 200 53.6 100 100 duty cycle considerations switching duty cycle is a key variable defning converter operation, therefore, its limits must be considered when programming the switching frequency for a particular application. the fxed minimum on-time and minimum off-time (see figure 4) and the switching frequency defne the minimum and maximum duty cycle of the switch, respectively. the following equations express the mini - mum/maximum duty cycle: min duty cycle = (minimum on-time) ? switching frequency max duty cycle = 1 C (minimum off-time) ? switching frequency when calculating the operating limits, the typical values for on/off-time in the data sheet should be increased by at least 60ns to allow margin for pwm control latitude and sw node rise/fall times. 0 100 200 300 50 150 250 3956 f04 time (ns) temperature (c) ?50 0 50 75 ?25 25 100 125 minimum on-time minimum off-time figure 4. typical switch minimum on and off pulse width vs temperature thermal considerations the LT3956 is rated to a maximum input voltage of 80v. careful attention must be paid to the internal power dis - sipation of the ic at higher input voltages to ensure that a junction temperature of 125c is not exceeded. this junction limit is especially important when operating at high ambient temperatures. if the LT3956s junction temperature reaches 165c (typ), the power switch will be turned off and the soft-start (ss) pin will be discharged to gnd. switching
LT3956 3956f a pplica t ions i n f or m a t ion will be enabled after the device temperature drops 10c. this function is intended to protect the device during momentary overload conditions. the major contributors to internal power dissipation are the current in the linear regulator to drive the switch, and the ohmic losses in the switch. the linear regulator power is proportional to v in and switching frequency, so at high v in the switching frequency should be chosen carefully to ensure that the ic does not exceed a safe junction temperature. the internal junction temperature of the ic can be estimated by: t j = t a + [v in ? (i q + f sw ? 7nc) + i sw 2 ? 0.14 ? d sw ] ? ja where t a is the ambient temperature, i q is the quiescent current of the part (maximum 1.7ma) and ja is the package thermal impedance (43c/w for the 5mm 6mm qfn package). for example, an application with t a(max) = 85c, v in(max) = 60v, f sw = 400khz, and having an average switching current of 2.5a at 70% duty cycle, the maximum ic junction temperature will be approximately: t j = 85c + [(2.5a) 2 ? 0.14 ? 0.7 + 60v ? (1.7ma + 400khz ? 7nc)] ? 43c/w= 123c the exposed pads on the bottom of the package must be soldered to a plane. these should then be connected to inter- nal copper planes with thermal vias placed directly under the package to spread out the heat dissipated by the ic. open led detection the LT3956 provides an open-drain status pin, vmode , that pulls low when the fb pin is within ~50mv of its 1.25v regulated voltage. if the open led clamp voltage is pro- grammed correctly using the fb pin, then the fb pin should never exceed 1.1v when leds are connected, therefore, the only way for the fb pin to be within 50mv of the regulation voltage is for an open led event to have occurred. input capacitor selection the input capacitor supplies the transient input current for the power inductor of the converter and must be placed and sized according to the transient current requirements. the switching frequency, output current and tolerable input voltage ripple are key inputs to estimating the capacitor value. an x7r type ceramic capacitor is usually the best choice since it has the least variation with temperature and dc bias. typically, boost and sepic converters require a lower value capacitor than a buck mode converter. as - suming that a 100mv input voltage ripple is acceptable, the required capacitor value for a boost converter can be estimated as follows: c i v v t f a s in f led a out in sw s ( ) ( ) ( ) ? ? ? ? = 1 therefore, a 4.7f capacitor is an appropriate selection for a 400khz boost regulator with 12v input, 48v output and 1a load. with the same v in voltage ripple of 100mv, the input capaci - tor for a buck converter can be estimated as follows: c i t f a s in f led a s w s ( ) ( ) ( ) ? ? . ? = 4 7 a 10f input capacitor is an appropriate selection for a 400khz buck mode converter with a 1a load. in the buck mode confguration, the input capacitor has large pulsed currents due to the current returned through the schottky diode when the switch is off. in this buck converter case it is important to place the capacitor as close as possible to the schottky diode and to the pgnd return of the switch. it is also important to consider the ripple current rating of the capacitor. for best reliability, this capacitor should have low esr and esl and have an adequate ripple current rating. the rms input current for a buck mode led driver is: i in (r ms ) = ( ) i d d led ? ? ? 1 where d is the switch duty cycle. table 2. recommended ceramic capacitor manufacturers manufacturer web site tdk www.tdk.com kemet www.kemet.com murata www.murata.com taiyo yuden www.t-yuden.com
LT3956 3956f a pplica t ions i n f or m a t ion output capacitor selection the selection of the output capacitor depends on the load and converter confguration, i.e., step-up or step-down and the operating frequency. for led applications, the equivalent resistance of the led is typically low and the output flter capacitor should be sized to attenuate the current ripple. use of an x7r type ceramic capacitor is recommended. to achieve the same led ripple current, the required flter capacitor is larger in the boost and buck-boost mode ap - plications than that in the buck mode applications. lower operating frequencies will require proportionately higher capacitor values. soft-start capacitor selection for many applications, it is important to minimize the inrush current at start-up. the built-in soft-start circuit signifcantly reduces the start-up current spike and output voltage overshoot. the soft-start interval is set by the soft- start capacitor selection according to the equation: t c v a ss ss = ? 2 10 a typical value for the soft-start capacitor is 0.01f. the soft-start pin reduces the oscillator frequency and the maximum current in the switch. the soft-start capacitor is discharged when en/uvlo falls below its threshold, during an overtemperature event or during an intv cc un - dervoltage event. during start-up with en/uvlo, charging of the soft-start capacitor is enabled after the frst pwm high period. schottky rectifer selection the power schottky diode conducts current during the interval when the switch is turned off. select a diode rated for the maximum sw voltage of the application and the rms diode current. if using the pwm feature for dimming, it is important to consider diode leakage, which increases with the temperature, from the output during the pwm low interval. therefore, choose the schottky diode with suffciently low leakage current. table 3 has some recom - mended component vendors. table 3. schottky rectifer manufacturers vendor web site on semiconductor www.onsemi.com diodes, inc. www.diodes.com central semiconductor www.centralsemi.com inductor selection the inductor used with the LT3956 should have a saturation current rating appropriate to the maximum switch current of 4.6a. choose an inductor value based on operating frequency, input and output voltage to provide a current mode signal of approximately 0.6a magnitude. the fol - lowing equations are useful to estimate the inductor value (t sw = 1/f osc ): l t v v v v a bu ck sw led in led in = ( ) ? ? ? . 0 6 l bu ck- b oos t = + ( ) t v v v v a sw led in led in ? ? ? . 0 6 l t v v v v a b oos t sw in led in led = ( ) ? ? ? . 0 6 table 4 provides some recommended inductor vendors. table 4. inductor manufacturers vendor web site sumida www.sumida.com wrth elektronik www.we-online.com coiltronics www.cooperet.com renco www.rencousa.com coilcraft www.coilcraft.com
LT3956 3956f loop compensation the LT3956 uses an internal transconductance error ampli - fer whose v c output compensates the control loop. the external inductor, output capacitor and the compensation resistor and capacitor determine the loop stability. the inductor and output capacitor are chosen based on performance, size and cost. the compensation resistor and capacitor at v c are selected to optimize control loop response and stability. for typical led applications, a 4.7nf compensation capacitor at v c is adequate, and a series re- sistor should always be used to increase the slew rate on the v c pin to maintain tighter regulation of led current dur - ing fast transients on the input supply to the converter. board layout the high speed operation of the LT3956 demands careful attention to board layout and component placement. the exposed pads of the package are important for thermal management of the ic. it is crucial to achieve a good electri - cal and thermal contact between the gnd exposed pad and the ground plane of the board. to reduce electromagnetic interference (emi), it is important to minimize the area of the high dv/dt switching node between the inductor, sw pin and anode of the schottky rectifer. use a ground plane under the switching node to eliminate interplane coupling to sensitive signals. the lengths of the high di/dt traces: 1) from the switch node through the switch to pgnd, and 2 ) from the switch node through the schottky rectifer and flter capacitor to pgnd, should be minimized. the ground points of these two switching current traces should come to a common point then connect to the ground plane at the pgnd pin of the LT3956 through a separate via to pin 12, as shown in the suggested layout (figure 5). likewise, the ground terminal of the bypass capacitor for the intv cc regulator should be placed near the gnd of the ic. the ground for the compensation network and other dc control signals should be star connected to the gnd exposed pad of the ic. do not extensively route high impedance signals such as fb and v c , as they may pick up switching noise. since there is a small variable dc input bias current to the isn and isp inputs, resistance in series with these pins should be minimized to avoid creating an offset in the current sense threshold. a pplica t ions i n f or m a t ion figure 5. boost converter suggested layout 3 via from led + led ? led + 3956 f05 LT3956 gnd sw vmode pwm ctrl cv cc vias to gnd plane vias to sw plane vias from pgnd pgnd vias r t c ss v out via led + via via from v out r c c c v in cv in pgnd l1 r1 r2 r3 r4 m1 c out c out d1 1 2 12 13 14 15 16 17 36 35 34 33 32 31 30 21 23 24 25 27 28 8 6 4 3 2 1 20 9 10 v in r s
LT3956 3956f 94% effcient 25w white led headlamp driver typical a pplica t ions pwm waveforms for 25w headlamp driver v in sw LT3956 l1 22h d1 gnd v c intv cc en/uvlo pgnd v ref isp 332k 100k intv cc r1 332k c vin 2.2f s 2 c out 2.2f s 5 c c 4.7nf v in 6v to 60v (80v transient) c ss 47nf r2 100k r c 20k r t 28.7k 375khz c vcc 4.7f 40.2k ctrl r4 16.2k r3 1m r s 0.68 370ma m1 intv cc 3956 ta02a vmode pwm ss rt isn fb pwmout m1: vishay siliconix si2328ds d1: diodes inc pds5100 l1: coiltronics dr125-220 c1, c2: murata grm42-2x7r225 see suggested layout (figure 5) 25w led string (current derated for v in < 11v) 5s/div pwm i led 200ma/div i li 1a/div 3956 ta02b v out = 68v v in = 15v
LT3956 3956f typical a pplica t ions buck-boost mode led driver LT3956 l1 68h gnd v c intv cc en/uvlo fb pgnd v ref isp 1m 0.1f v in 9v to 45v v in v in v out l1: coilcraft mss1038-683 d1: on semiconductor mbrs3100t3 m1: zetex zxm6ip03f q1: zetex fmmt493 187k 35.7k 300khz 3.4k 10nf 4.7f ctrl 750 1k q1 m1 680m 619k 10k d1 4.7f 35v 3956 ta03a vmode pwm ss rt isn pwmout c1 4.7f 1f 100v 24v led string 350ma 100k intv cc intv cc v in sw effciency vs v in v in (v) 0 10 80 efficiency (%) 84 88 92 96 100 30 40 3956 ta03b 20 50 28v in /0v to 28v sepic supercap charger with input current limit v in LT3956 l1a 33h 1:1 gnd v c intv cc intv cc en/uvlo sw v ref isp 10k 1f 10nf v in 28v 1.2a v out 0v to 28v l1: w rth elektronik 744871330 d1: on semi mbrs36ot q1: mmbta42 c1, c3, c4: taiyo-yuden gmk 3i6bj106 28.7k 375khz c3 10f pgnd l1b c2 4.7f ctrl 30.1k 1m d1 c4 10f 3956 ta04a vmode pwmout pwm ss rt isn fb 40.2k 1m 2k 59k 25k 536k 14k c1 10f q1 200m input and output current vs output voltage v out (v) 0 0 input/output current (a) 0.5 1.0 1.5 2.0 3.0 5 10 15 20 3956 ta04b 25 30 2.5 input output
LT3956 3956f 90% effcient, 20w sepic led driver v in LT3956 l1a 33h 1:1 gnd v c intv cc en/uvlo sw v ref isp 100k intv cc 1m c1 4.7f 50v 10nf 0.01f l1: coiltronics drq127-330 d1: vishay pds5100 m1: zetex zxm61n03f v in 8v to 50v 185k 250k 25k c3 10f s 2 35v pgnd l1b 15k 28.7k 375khz c2 4.7f 10v ctrl 1m 0.25 m1 1a d1 c4 2.2f (50v) 20w led string current derated for v in < 13v 3956 ta05a vmode pwm ss rt isn fb pwmout 56.2k v in (v) 0 10 80 efficiency (%) 84 88 92 96 100 30 40 3956 ta05b 20 50 typical a pplica t ions effciency vs v in 90w buck mode led driver, 80v in /60v out v in v in LT3956 gnd v c intv cc v ref intv cc en/uvlo sw isp 100k intv cc 1m 0.01f 0.1f d1: vishay 10mq100n l1: w rth elektronik 744066330 m1: vishay siliconix si7113dn q1: zetex fmmt593 q2: zetex fmmt493 c1, c2: murata grm42-2x7r225 v in 64v to 80v 20k 28.7k 375khz 4.7f 0.1 1.5a 16 white leds, 90w 3956 ta06a vmode pwm ctrl ss rt pgnd isn fb pwmout c1 2.2f s 4 c2 2.2f s 3 267k 200k 10k q1 m1 d1 l1 33h 200k 470 1k q2 24.3k 13k v in (v) 64 90 efficiency (%) 92 94 96 98 100 72 76 3956 ta05b 68 80 effciency vs v in
LT3956 3956f information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. p ackage descrip t ion 5.00 p 0.10 6.00 p 0.10 note: 1. drawing is not a jedec package outline 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.20mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 top mark (note 6) 0.40 p 0.10 1 36 35 30 31 32 33 34 28 20 21 23 24 25 27 2 3 4 6 8 9 10 12 13 14 15 16 17 bottom view?exposed pad 2.00 ref 1.50 ref 0.75 p 0.05 r = 0.125 typ r = 0.10 typ pin 1 notch r = 0.30 or 0.35 s 45 o chamfer 0.25 p 0.05 0.50 bsc 0.200 ref 0.00 ? 0.05 (uhe28ma) qfn 0110 rev c recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 0.70 p 0.05 4.10 p 0.05 5.50 p 0.05 package outline 1.88 p 0.10 1.53 p 0.10 2.00 ref 1.50 ref 5.10 p 0.05 6.50 p 0.05 uhe package variation: uhe28ma 36-lead plastic qfn (5mm s 6mm) (reference ltc dwg # 05-08-1836 rev c) 3.00 p 0.10 3.00 p 0.10 0.12 p 0.10 1.88 p 0.05 1.53 p 0.05 3.00 p 0.05 3.00 p 0.05 0.48 p 0.05 0.12 p 0.05 0.48 p 0.10 0.25 p 0.05 0.50 bsc 10 1 2 3 4 6 8 9 17 20 21 23 24 25 27 28 30 31 32 33 34 35 36 12 13 14 15 16
LT3956 0 3956f linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com ? linear technology corporation 2010 lt 0510 ? printed in usa r ela t e d p ar t s typical a pplica t ion buck mode 1a led driver with high dimming ratio and open led reporting effciency vs v in part number description comments lt3756/lt3756-1/ lt3756-2 100v in , 100v out , full featured led controller v in : 6v to 100v, v out(max) = 100v, true color pwm dimming = 3000:1, i sd < 1a, 3mm 3mm qfn-16 and ms16e packages lt3755/lt3755-1/ lt3755-2 40v in , 75v out , full featured led controller v in : 4.5v to 40v, v out(max) = 60v, true color pwm dimming = 3000:1, i sd < 1a, 3mm 3mm qfn-16 and ms16e packages lt3474 36v, 1a (i led ), 2mhz, step-down led driver v in : 4v to 36v, v out(max) = 13.5v, true color pwm dimming = 400:1, i sd < 1a, tssop16e package lt3475 dual 1.5a (i led ), 36v, 2mhz step-down led driver v in : 4v to 36v, v out(max) = 13.5v, true color pwm dimming = 3000:1, i sd < 1a, tssop20e package lt3476 quad output 1.5a, 36v, 2mhz high current led driver with 1000:1 dimming v in : 2.8v to 16v, v out(max) = 36v, true color pwm dimming = 1000:1, i sd < 10a, 5mm 7mm qfn package lt3477 3a, 42v, 3mhz boost, buck-boost, buck led driver v in : 2.5v to 25v, v out(max) = 40v, dimming = analog/pwm, i sd < 1a, qfn and tssop20e packages lt3478/lt3478-1 4.5a, 42v, 2.5mhz high current led driver with 3000:1 dimming v in : 2.8v to 36v, v out(max) = 42v, true color pwm dimming = 3000:1, i sd < 3a, tssop16e package v in LT3956 gnd v c intv cc en/uvlo fb v in intv cc isp 2.2nf 0.1f v in 24v to 80v 28.7k 375khz 47k 100k 4.7f 0.1 c2 4.7f s 5 c1 1f s 2 l1 33h d1 1a 3956 ta07a vmode pwm ss rt isn pwmout pgnd sw 1m 61.9k d1: diodes inc b1100/b l1: w rth 74456133 m1: vishay siliconix si5435bdc q1: zetex fmmt493 q2: zetex fmmt593 c1: tdkc3226x7r2a105k c2: tdkc3225x7rie475k 200k 200k 200k 20k 6 white leds 20w 1k 750 m1 intv cc q1 q2 v ref ctrl 30.1k 10k v in (v) 20 80 efficiency (%) 84 88 92 96 100 40 60 3956 ta06b 80 30 50 70

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